VMIVME-1111 Input Configuration

VMIVME-1111 64Bit High-Voltage Digital Input Board


Questions regarding input signal configuration as documented in the Product Manual 500-001111-000 Rev Y. Due to the number and complexity of the available input configuration options, it can be difficult to determine how to obtain the desired setup. 


1. On page 60 of the Product Manual, first line of first paragraph, where is the Appendix A? Neither the online PDF manual nor the document shipped with the product has it.


Appendix A contains the board schematics. Due to a change in GE-Fanuc policy, this appendix is no longer provided as part of the Product Manual. The reference to Appendix A on page 60 should have been deleted.


2. On page 61, where is Figure 2-28 represented on the VMIVME-1111 board? How does it relate to the Jumper Configuration diagrams, such as Figure 2-16?


Figure 2-28 is a simplified generic version of the schematic diagrams shown in Figures 2-6,8,10,12,14,16,18,20,22,24.  Jumpers J1, J2, and J3 relate directly to tables 2-4 and 2-5, but do not appear directly on the board itself. See the next question and answer for more details.


3. On page 61, where are J1, J2, and J3 on the board and on the other diagrams?


For Figures 2-6,8,10,12,14,16,18,20,22,24, J1 refers to jumper JK 5,6,7,8; J2 refers to JM 4,5,6; and J3 refers to JM 1,2,3 for connector P4. For connector P3, J1 refers to JL 5,6,7,8; J2 refers to JN 4,5,6; and J3 refers to JN 1,2,3. Note that Figures 2-6,8,10,12,14,16,18,20,22,24 schematics only show the jumper designations for connector P4. 


4. On page 61, Figure 2-28, what is VtIN and VT? Is VT the same as Vt, the threshold voltage?

VtIN is the user channel input high from connector P3 or P4. It is labeled A01 on Figures 2-6,8,10,12,14,16,18,20,22,24. VT is the user channel input low from P3 or P4. It is labeled C01 on Figures 2-6,8,10,12,14,16,18,20,22,24. VT is the same as Vt. Note that Jumpers JA through JH determine if this node is driven from the user input or only by Jumper JK 5,6,7,8 (connector P4) and JL 5,6,7,8 (connector P3).

5. On page 61, Table 2-4 and Table 2-5, where are the R = 3.3K ohms and R = 33K ohms resisters on the VMIVME-1111 board?

Resistor R in Figure 2-28 and Tables 2-4 and 2-5 refers to the pull-down resistor packs RP31,38,45,52,59,66,73, and 80 as shown in Table 2-3 on page 58 and as RP31 in Figures 2-6 through 2-24.

6. On page 59, Figure 2-26. Does the JI jumper setting allow for adjusting the threshold voltage value by using an external voltage? If it does, for a 28Vdc threshold voltage, should we apply an external voltage of 28Vdc or can we get a 28Vdc threshold voltage by using the table and formulas on page 61?

Jumper JI selects the source from which to obtain the external voltage. Be sure to read the warnings on page 59 regarding external voltage selections. It is possible to short the external voltage to ground and destroy the board if the wrong jumper settings are used. To get a 28V threshold, you will need to apply an external voltage source. Refer to Table 2-5 on page 61, assuming you have the factory configuration using R=33K for pull-down resistors, for a 28V external input the threshold voltages range from about 13 to 16V depending on how you set Jumpers J2 and J3. You would need a 48V external voltage to get threshold voltages in the range of 23 to 26V. You could swap the pull-up and pull-down resistor packs (see Table 2-3 on page 58 for a summary of Pull-up and Pull-down resistor assignments) and then use Table 2-4. With a 28V external input, you could get threshold voltages ranging from about 24 to 26V.   To get exactly a 28V threshold, you would need to increase your external source voltage. Use the formulas associated with Table 2-5 to calculate the required external voltage.

7. Refer to page 48, Figure 2-16 and page 65, Table 2-7. When an external voltage applied to A01 and C01, there is a data change from register 7. When applied voltage to A28 and C28, a data change from register 4. Figure 2-16 implies that applying a voltage to A01 and C01 will result in data change in address C000, which is register 0. Why did we observe data change in reversed order of the registers? We have the default base address configuration.  

The A01, C01, CI00, and CO00 labels appearing in Figures 2-6,8,10,12,14,16,18,20,22,24 schematics are generic and not intended to indicate the actual relationship between a certain input channel and its register. Most VMIVME data I/O boards map the output channels in descending order. For the VMIVME-1111, Channels 63 through 56 are mapped to register 0 (the base address). Channels 55 through 48 are controlled by register 1, and so on. Finally, channels 7 through 0 are mapped to register 7. This is documented in Table 3-4 pages 70-71.