FPGA-based Baseband Processor PMC Delivers Power, Flexibility, Ease Of Use

ICS-1580 targets SDR, DSP applications Continuing to respond to customer demand for software defined radio (SDR) products that deliver power, user programmability and ease of integration, ICS (Interactive Circuits & Systems) – part of Radstone Embedded Computing – today announced the ICS-1580 baseband processing engine.  Launched at UDT Europe 2005 (Stand 66:  Amsterdam RAI Center, June 21st – 23rd) the ICS-1580 is designed for the high data rate, computationally intensive applications common in software defined radio systems. Featuring a user programmable Xilinx Virtex II Pro FPGA surrounded with memory and high-speed data I/O, the ICS-1580 includes four banks of SDRAM memory, four banks of high-speed QDRII SRAM, and two 128 Mbit flash memory devices. For data I/O, legacy systems can rely on the 64/66 PCI interface, while more modern applications can make use of the ICS-1580A’s high-speed serial switched fabric capabilities, which provide aggregate bandwidth of 25 Gbits/second. “The ICS-1580 builds on our extensive track record of developing and delivering solutions that both match and anticipate customer needs,” said Ken Armitage, Vice President, Product Development at ICS.  “It combines high-performance with ease of use, and its compact PMC form factor makes it ideal for the increasing number of applications that are being developed for environments that are constrained in weight or size.  We are building a leadership position in the field of software defined radio and digital signal processing, and the ICS-1580 is further evidence of the depth and breadth of solutions we’re able to offer to those markets.” Built in the industry standard PMC form factor, the ICS-1580 allows cutting edge FPGA-based processing power to be added to any host equipped with a PMC site. Alternatively, elegant, high-performance data acquisition and processing systems can be quickly deployed by combining the ICS-1580 with existing SDR modules such as the ICS-554, 564, or 572. The 400 MHz Power PCs (embedded in the Virtex II FPGA) run a pre-installed TimeSys Linux kernel, allowing remote systems to operate autonomously, and the ICS-supplied EDK/HDK enable rapid development and shorter time to market.