Byte Order Conventions When Using VME Modules


Byte Order Conventions when using VME modules


PACSystems CPUs use the Intel convention for storing word data in bytes. They store the least significant byte of a word in address n and the most significant byte is stored in address n+1. Many VME modules follow the Motorola convention of storing the most significant byte in address n and the least significant byte in address n+1. 


The VMEbus access circuitry of the PACSystems CPU automatically assigns byte address 1 to the same storage location regardless of the byte convention used by the other device. However, because of the difference in byte significance, word and multiword data, for example, 16 bit integers (INT, UINT), 32 bit integers (DINT) or floating point (REAL) numbers, must be adjusted when being transferred to or from Motorola-convention modules. In these cases, the two bytes in each word must be swapped, either before or after the transfer. In addition, for multiword data items, the words must be swapped end-for-end on a word basis. For example, a 64-bit real number transferred to the PACSystems CPU from a Motorola-convention module must be byte-swapped and word-reversed, either before or after reading, as shown below:


NOTE: Character (ASCII) strings or BCD data require no adjustment since the Intel and Motorola conventions for storage of character strings are identical.





The SWAP function is used to swap two bytes within a word (SWAP WORD) or two words within a double word (SWAP DWORD). The SWAP can be performed over a wide range of memory by specifying a length greater than 1. If that is done, each word or double word of data within the specified length is appropriately swapped.

When the SWAP function receives power flow through its enable input, it swaps the data in reference IN and places the swapped data onto output reference Q. The function passes power to the right whenever it receives power.



big-endian (Motorola) and little-endian (Intel)

Big-endian and little-endian are terms that describe the order in which a sequence of bytes are stored in computer memory. Big-endian is an order in which the "big end" (most significant value in the sequence) is stored first (at the lowest storage address). Little-endian is an order in which the "little end" (least significant value in the sequence) is stored first.


Stated slightly differently ---


Motorola processors are big endian (bytes are numbered from most-significant to least-significant in a multi-byte word) while Intel processors are little endian (bytes are numbered from least-significant to most-significant).



For example, the two bytes required for the hexadecimal number 4F52 would be stored as follows: 


%R1000 (MSB)

%R1000 (LSB)










  • VMEbus ( does not specify byte order

  • VMEbus was developed to support the 680x0 family of processors, making it big-endian.

  • GE Fanuc's Embedded Systems products typically follow the big-endian convention.  Refer to the product data sheet for more information.

  • GE Fanuc's PACSystems bus was developed to support the 80x86/Pentium family of processors, making it little-endian.




GFK-2235, PACSystems RX7i User's Guide to Integration of VME Modules

GFK-0448, Series 90-70 User's Guide to Integration of 3rd Party VME Modules